This invention relates generally to making of masks for semiconductor use and more particularly to detection and eradication of noise and other electrical and mechanical resonance in an electron beam tool used in writing to a substrate.
In today""s fabrication of Integrated Circuits (IC) and other semiconductor devices, lithographic delineation procedures are used to yield positive or negative images to bring about selective processing, e.g. etching, implantation, diffusion, deposition, etc. This is especially true in fabrications of masks where the fabrication tool provides Blocking regions and Transparent regions which when illuminated by electron radiation yields an image defined by relatively low and high electron intensities, respectively. A Blocking region is usually defined as the mask region resulting in a degree of electron attenuation in the image which is of consequence in device fabrication. By contrast, a Transparent region is the mask region resulting in a degree of electron attenuation in the image which is small relative to blocking regions in terms of device fabrication.
In the semiconductor industry, there is a continuing trend toward an increased device density. To achieve this, there is a continued effort towards the scaling down of device dimensions on semiconductor wafers. As smaller feature sizes become the new requirements (i.e. decreased width and spacing of interconnecting lines, etc.), new ways have to be utilized to achieve their manufacturing. High resolution lithographic processes are used as one of these manufacturing techniques to yield small component features.
In general, lithography refers to processes for pattern transfer between various media. In lithography for integrated circuit fabrication, a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the resist. The film is then selectively exposed to radiation, such as optical light, x-rays, or an electron beam, through an intervening master template or the mask, forming a particular pattern. (In a mask, this leads to the creation of Blocking and Transparent regions which when illuminated by electron radiation yields an image defined by relatively low and high electron intensities, respectively.)
Most often exposed areas of the coating become either more or less soluble than the unexposed areas (depending on the type of coating) in a particular solvent developer. The more soluble areas are removed with the developer in a developing step, the less soluble areas remain on the silicon wafer forming a patterned coating. The pattern corresponds to the image of the mask or its negative. The patterned resist is used in further processing of the silicon wafer.
At various stages in forming the patterned resist coating and processing the silicon wafer, it is desirable to measure critical dimensions resulting from the lithographic process. Critical dimensions can include the size of features in the wafer or patterned resist such as line widths, line spacing, and contact dimensions. Several calibration methods are developed and can be used such as scanning electron microscopy (SEM) systems.
In such calibration system, because of the super fine structures to be calibrated, an electron beam is often scanned across the sample. The beam interacts with the sample to produce measurable responses that vary with position over the course of a scan. Although all such calibration systems measure critical dimensions with high precision, they must be calibrated frequently for the measurements to be accurate. Precise measurements are reproducible, but contain systematic errors that must be quantified and taken into account for the measurements to be accurate. Calibration quantifies systematic errors and is carried out on a regular basis.
Calibration involves taking measurements on a calibration standard. A calibration standard is a sample having accurately known dimensions. One calibration standard commonly employed is a periodic pattern formed into a silicon substrate. Another type of calibration standard is formed with a patterned polysilicon coating over a silicon wafer. A thin layer of silicon oxide is used to facilitate binding between the patterned polysilicon and the wafer. A similar calibration standard is formed with a uniform polysilicon coating over the silicon oxide layer and has a calibration patterned formed in another silicon oxide coating that is formed over the polysilicon. Other calibration standards are also used and are available.
A number of problems, however, still exists in the fabrication of masks and calibration of such devices using (E beam) tools. One of the biggest problems is the presence of detractors such as mechanical and electrical sources of noise which impede the proper usage of the E beam tool. It would be important, therefore, to introduce a method and apparatus that can detect and quantify the noise during normal operation or as a diagnostic measure.
These and other objects are provided by the present invention for an apparatus and method for detection and measurement of noise on E beam tools and devices. A spectrum analyzer looks at the different frequency components of the noise. The deflected electron beam from the tool is calibrated in a coarse and fine mode by scanning the beam over a grid-like calibration target. The position of where the bars are detected is compared to where they actually are, and the deflection can be calibrated so that it matches the grid. This invention can utilize a Fast Fourier Transform (FFT) of the time-ordered data which allows one to see peaks associated with noise. The calibration sequence has to be performed to allow greater accuracy r for the electron beam tool in placement of patterns on a wafer or mask.